Wireless
Communication Wireless
Communication
Contributed by Serguei V. Valov, RILRDT, Saint-Petersburg
The success of the multiple-mode and multiple-band military radio called Speakeasy was largely due to its software-programmable technology. This has solicited numerous endeavors towards expanding the approach to civilian radio applications. Indeed, it seems attractive to implement some universal radio hardware which would possess versatile multiple-functionality. That is, it would be capable to perform
Summarizing opinions of the most authors who mention the multiple-functionality radio problem in literature, it is to say that the time for ultimate multiple-functional hardware of wireless applications, which would be capable of to cope with truly multiple-standard, multiple-service etc. functionality, has still not come. Nevertheless, the contemporary progress in the very large scale integration (VLSI) technology, particularly in the Digital Signal Processors (DSP), bear certain preconditions for the dreams to become true. Another process coming from the opposite direction towards the multiple-functional radio hardware is the elaborate standardization and harmonization endeavors for the forthcoming third generation of wireless communications.
The page pursues to give a comprehensive treatment of the multiple-functionality
radio problem which is referred to as Software Radios. Mainly, the material
is based on the scarce literature
contents of which have been refracted through author's own experience
and impressions taken from immediate communications with experts.
The page will discuss the following main aspects:
what the Software Radios
do mean and represent as well as when the Software Radios are feasible.
Let us imagine that we have to subscribe for several operators providing heterogeneous Wireless Communication standards, say GSM, NMT, DECT, etc. Now, we need either to deal with the same number of separate handsets, each for the relevant standard, or to combine the handsets into a single multiple-standard handset. The figure below shows possible approaches to provide the latter way.
On the one hand, the multiple-standard handset could be implemented as a set of all the desirable heterogeneous standards' hardware which can be referred to as Hardware Radios (HWR). Apparently, endeavoring to reach an acceptable complexity and size, we would have to reuse, when this would be possible, some elements of a standard's hardware for another standard's hardware. Therefore, we would be faced the task to elaborate an optimal architecture for the HWR as well as to employ, besides usual analog and fixed digital hardware, also software-programmable digital hardware. In spite of the endeavor, there is no doubt in that we could hardly get any HWR of practicable complexity and size. Indeed, within this approach, the analog and fixed digital hardware are dominant and the closer to the antenna the more dominant. Also, the software programmability is restricted with separate elements and functions. At that, even if an element is programmable, it has doubtlessly been conceived for the sake of its performance rather than for the sake of versatile functionality. There is also a one more drawback in the HWR approach, namely it is inflexible, i.e. every new standard, which we wished to add, would inevitably require new hardware elements. The only obvious advantage of the HWR approach is its capability to function in the real-time scale.
On the other hand, we could strive to implement the multiple-standard handset with a state-of-art computer and an advanced A/D-D/A conversion technology. Thereby, we apparently could defeat both the disadvantages of the HWR: the complexity/size impracticability and the inflexibility in respect of new standards, at the expense of loss of the only HWR advantage: the real-time performance. Indeed, even if to use a multiple-processor architecture even then the intput A/D converter will remain a bottleneck of the new Radios and we would need to facilitate the converter's function with some preliminary RF processing the antenna signal. Moreover, computer processors, on the contrast to the aforementioned software-programmable elements of the HWR, are doubtful for real-time performance and this is a cost for their universal functionality. Let us refer to this approach as Computer Radios (CR).
Now, we have got the HWR of the restricted programmability , on the
one hand, and the CR of the too universal programmability and the need
of RF pre-processing, on the other hand. The first is too complex whereas
the second is too slow. Let us push the both approaches each towards the
other. The figure below shows this process.
The figure presents a space of three dimensions. The "length" dimension shows placement of the A/D converter with the range from 'far from antenna' till straight at the 'antenna front-end'. The "width" dimension reflects to what extent software programmable elements are dominant or non-dominant with bounds from a 'restricted' number elements and functions till the 'full' dominance. At last, the "height" dimension represents a degree of processors' functionality from application 'narrow-specific' processors till completely 'universal' ones. Inside the cube, the HWR approach and the CR one each occupies the opposite corner. The HWR have restricted programmability with narrow-specific processors placed far from the antenna front-end. Conversely, the CR work straight with the digital-converted signals, have full dominance of programmable elements and functions performed by universal processors. The arrows pointed toward the cube center show adjustments of the aforementioned parameters while the HWR and the CR moves each towards the other.
Apparently, the desirable multiple-standard handset, which would comply with both the practicable size/complexity and the practicable real-time, might appear in the half-way somewhere in roundabouts of the cube center. That would be namely Software Radios (SWR).
One can extend the aforementioned speculations on a variety of situations when we would desire to get some multiple-functional wireless communication equipment, say, a multiple-standard cellular base station, multiple-service terminal providing a lot of heterogeneous services through one and the same air-interface, etc. In any way, the matter of question would be feasibility of the equipment. Feasibility obviously depends upon many factors. The figure below presents speculations on this topic.
Now, the
"length" dimension implies restrictions to the equipment's size
with bounds from a 'stationary' equipment till 'handset'. There are implied
transportable, portable, and other possible variants between the two ultimate
positions. The "width" dimension reflects how complex functionality
of the desirable equipment is: from capability to support various yet 'homogeneous'
modifications of one and the same standard or service etc. till completely
multiple-standard and multiple-service equipment which would be capable
to cope with 'heterogeneous' standards and services based on different
technology approaches and amounts of bandwidth. The complexity also depends
on whether a preliminary standardization process paved the way for the
desirable standards and services or they were conceived completely independently
each upon others without any endeavor to comply them with some regulations.
At last, the "height" dimension is a representative of the equipment's
performance in time scale: 'off-line', on-line, near-real-time, or 'real-time'
in comparison with RF processes. The diagonal line connects two ultimate
points, namely 'very feasible' and 'hardly feasible' and also the color
changes inside the cube reflect a degree of feasibility: the more green
the more feasible, the more red the less feasible. In fact, the distance
between a certain point inside the cube and the 'very feasible' corner
is a measure of feasibility for the point. The relevant distances are reflected
by means of sizes of volumes which, in turn, mark some interesting for
us points.
volume 1 reflects the aforesaid multiple-standard handset whereas volume 2 corresponds a base station for the same multiple-standards. The much more loose size requirements make the latter one be much more feasible yet the inherent heterogeneity of the contemporary wireless communication standards make it remains still overwhelming.
volume 3 corresponds to contemporary base stations of GSM and IS-136 standards implemented with specialized base station DSPs 1620 by Lucent Technologies. Although, each of the base stations is enabled to handle just with the only respective standard, i.e. its functionality is ultimately homogeneous, such a solution paves the way for further SWR decisions.
volumes 4 is a smart antenna applique for the AMPS base stations. The applique has been conceived for maximizing the carrier-to-interference ratio and implies a performance of near-real-time in comparison with the speed of the RF processes. The SWR decision has been chosen to handle three relatively heterogeneous approaches towards the task. Albeit being multiple-approach, the applique nevertheless has quite homogeneous functionality in comparison with, say, the multiple-standard equipments.
volume 5 corresponds to Speakeasy, the Military multiple-band & multiple-mode Software Radio. The "width" coordinate of volume 5 implies that, anyway, the military radios are inherently much proper unified and standardized in comparison with the civilian radios and therefore much better prepared for utilizing the SWR technologies.
Summarizing opinions of the most authors who mention the SWR problem in the literature, it is to say that the time for ultimate SWR, which would be capable of to cope with truly multiple-standard and multiple-service functionality, has still not come. However, doubtlessly, the progress in the VLSI technology will make the colors become more green and less red in not far future.
volumes 6 - 8 are to reflect the SWR as a key technology towards IMT-2000 standards and belong respectively to the terrestrial base station, satellite-based, and handset equipments. Note, the elaborate endeavors towards standardization and harmonization within the IMT-2000 concept pave the way for the SWR's feasibility in comparison with the aforementioned hypothetic multiple-standard equipments of volumes 1 and 2.
The figure below represents a basic ultimate SWR architecture for a receiver. As is apparent, one can easy extend the architecture to the transmitter case. Term 'ultimate' implies ultimate functionality which would be so versatile as possible, i.e. multiple-band, multiple-mode, multiple-standard, multiple-service, etc. In a word, the ultimate SWR situate closer to the corner formed by the 'heterogeneous' and 'real-time' planes of the aforementioned "cube of feasibility".
As the SWR is a 'child' of both the HWR and CR, its basic architecture includes features of both of them. The canonical (superheterodyne) HWR architecture, which includes Antennas, Radio Frequency (RF), Intermediate Frequency (IF), Baseband, and Bitstream stages, reflects in the respective specialized processors of the SWR. In turn, the CR has got a twofold reflection, firstly, in a processors / ultra-high-speed bus organization for the aforementioned stages and, secondly, in a microcomputer presented with a host board and a low-speed bus. Incidentally, the processors/bus organization bears a one more resemblance between the SWR and CR, namely an openness of the architecture.
The Antennas stage presented with a broadband array which is implied performing as multiple-band antenna, on the one hand, and capable to provide the best of smart antennas, on the other hand, i.e., to reduce interference, to cope with Space Division Multiple Access (SDMA), etc. in accordance with controls from an environment processor. In turn, the environment processor performs at a near-real-time mode providing, besides the array control, a so-called 'environment management', i.e., an intelligent function used, say, during handovers, channel allocation procedures etc. As is obvious, the processor implementation is based on DSPs.
The array is followed by an analog RF preliminary processor which provides broadband (multiple-band) linear amplifying. In addition, the pre-processor can also facilitate performances of the digital processors by means of some preliminary down-conversion, filtering etc. If so, the pre-processor's output becomes wideband (single-band) instead of broadband at the expense of an increase in the pre-processor's ASIC complexity. Apparently, the pre-down-conversion, filtering etc. will be inevitable features of the pre-processor even though in future, particularly if the SWR have to embrace different multiple-band scenarios, that is to say outdoor, indoor, satellite etc., let alone that contemporary versions of the subsequent analog-to-digital (A/D) converter hardly can cope with the broadband signal. Now, after the pre-processor, we have the broad- or wide-band A/D converter which feeds the ultra-high-speed bus with a raw digital signal used, in turn, as an input signal for the aforementioned environment processor and for an IF processor.
The canonical function of the IF processor is channelization, i.e., channels' separation in accordance with a certain type of multiple access, and subsequent transformation for the channels signals to a baseband format. A certain down-conversion is usually a part of this procedure. At least, the contemporary technologies can hardly allow to accomplish channelization completely by means of DSP technologies whereas digital ASIC technologies of VLSI would be apropos. Thus, the IF processor rationale consists in so reconfigurable as possible semi-fixed digital ASICs combined with specialized DSPs. At that, the closer to the output of the IF processor the higher chances of DSPs.
The subsequent after the IF stage baseband processor either deals immediately with the separated baseband format channel-signals or previously completes the channelization procedure. Its main functions are equalization and demodulation of the baseband signals. If further processing requires the baseband processor to provide so-called 'soft-decision', we will talk about pre-demodulation. The processor is doubtlessly situated inside the DSP realm. At that, the processors' implementation implies a "one DS processor per channel" basis.
The real-time chain is completed with a bit-stream processor dealing with channel decoding, de-interleaving, source decoding, decryption, etc. If channel decoding requires the baseband processor to provide the soft decision, the bit-stream processor completes demodulation. As is apparent, the most difficulty for the DSP implementation is hidden in channel decoding. Indeed, DSPs are apropos, say, at Viterby decoding of comparatively weak convolutional codes whereas powerful convolutional codes require dedicated VLSI ASICs nowadays. Say, BCH codes need specialized microprocessors dealing with the Galua Field etc. Such a heterogeneity could be overcame only with a combination of DSPs and reconfigurable semi-fixed ASICs.
Now, it is a time to say a couple of words about the microcomputer, in particular about the host board and the low-speed bus. One can notice that is pretty the former system block of the CR. It takes the most of control procedures and performs at an on-line time scale. Also, it stores namely Software which are used then at all the programmable real- and near-real-time processors. At that, the board can renew or update its Software through a wired liaison with the network in the base station case, or by means of wireless Software Downloading in the terminal/handset case.
Completing the discussions around the SWR architecture, it is to say that the main hopes for the SWR future are laid on the DSP realm. Step-by-step, the realm has to embrace more and more area of the real-time chain, thereby making the SWR more and more feasible. Incidentally, the fact bears two consequences.
